(command.CommandList children: [ (command.ShAssignment left: <Id.Lit_VarLike 'MACHINE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'MACHINE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'MACHINE='> name:MACHINE) op: assign_op.Equal rhs: (rhs_word__Empty) ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'SCRIPT_NAME='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'SCRIPT_NAME='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'SCRIPT_NAME='> name:SCRIPT_NAME) op: assign_op.Equal rhs: {<elfd30v>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'TEMPLATE_NAME='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'TEMPLATE_NAME='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'TEMPLATE_NAME='> name:TEMPLATE_NAME) op: assign_op.Equal rhs: {<generic>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'EXTRA_EM_FILE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'EXTRA_EM_FILE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'EXTRA_EM_FILE='> name:EXTRA_EM_FILE) op: assign_op.Equal rhs: {<genelf>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'OUTPUT_FORMAT='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'OUTPUT_FORMAT='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'OUTPUT_FORMAT='> name:OUTPUT_FORMAT) op: assign_op.Equal rhs: {(DQ <elf32-d30v>)} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'TEXT_START_ADDR='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'TEXT_START_ADDR='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'TEXT_START_ADDR='> name:TEXT_START_ADDR) op: assign_op.Equal rhs: {<0x00000000>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'DATA_START_ADDR='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'DATA_START_ADDR='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'DATA_START_ADDR='> name:DATA_START_ADDR) op: assign_op.Equal rhs: {<0x20000000>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'EMEM_START_ADDR='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'EMEM_START_ADDR='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'EMEM_START_ADDR='> name:EMEM_START_ADDR) op: assign_op.Equal rhs: {<0x80000000>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'STACK_START_ADDR='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'STACK_START_ADDR='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'STACK_START_ADDR='> name:STACK_START_ADDR) op: assign_op.Equal rhs: {<0x20008000>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'EIT_START_ADDR='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'EIT_START_ADDR='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'EIT_START_ADDR='> name:EIT_START_ADDR) op: assign_op.Equal rhs: {<0xfffff020>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'TEXT_SIZE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'TEXT_SIZE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'TEXT_SIZE='> name:TEXT_SIZE) op: assign_op.Equal rhs: {<64K>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'DATA_SIZE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'DATA_SIZE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'DATA_SIZE='> name:DATA_SIZE) op: assign_op.Equal rhs: {<32K>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'EMEM_SIZE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'EMEM_SIZE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'EMEM_SIZE='> name:EMEM_SIZE) op: assign_op.Equal rhs: {<8M>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'EIT_SIZE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'EIT_SIZE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'EIT_SIZE='> name:EIT_SIZE) op: assign_op.Equal rhs: {<320>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'TEXT_MEMORY='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'TEXT_MEMORY='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'TEXT_MEMORY='> name:TEXT_MEMORY) op: assign_op.Equal rhs: {<emem>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'DATA_MEMORY='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'DATA_MEMORY='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'DATA_MEMORY='> name:DATA_MEMORY) op: assign_op.Equal rhs: {<emem>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'BSS_MEMORY='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'BSS_MEMORY='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'BSS_MEMORY='> name:BSS_MEMORY) op: assign_op.Equal rhs: {<emem>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'TEXT_DEF_SECTION='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'TEXT_DEF_SECTION='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'TEXT_DEF_SECTION='> name:TEXT_DEF_SECTION) op: assign_op.Equal rhs: {(DQ )} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'DATA_DEF_SECTION='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'DATA_DEF_SECTION='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'DATA_DEF_SECTION='> name:DATA_DEF_SECTION) op: assign_op.Equal rhs: {(DQ )} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'EMEM_DEF_SECTION='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'EMEM_DEF_SECTION='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'EMEM_DEF_SECTION='> name:EMEM_DEF_SECTION) op: assign_op.Equal rhs: {(DQ <'(rwx)'>)} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'ARCH='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'ARCH='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'ARCH='> name:ARCH) op: assign_op.Equal rhs: {<d30v>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'EMBEDDED='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'EMBEDDED='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'EMBEDDED='> name:EMBEDDED) op: assign_op.Equal rhs: {<t>} ) ] redirects: [] ) ] )