(command.CommandList children: [ (command.ShAssignment left: <Id.Lit_VarLike 'TEMPLATE_NAME='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'TEMPLATE_NAME='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'TEMPLATE_NAME='> name:TEMPLATE_NAME) op: assign_op.Equal rhs: {<elf32>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'GENERATE_SHLIB_SCRIPT='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'GENERATE_SHLIB_SCRIPT='> lhs: (sh_lhs_expr.Name left: <Id.Lit_VarLike 'GENERATE_SHLIB_SCRIPT='> name: GENERATE_SHLIB_SCRIPT ) op: assign_op.Equal rhs: {<yes>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'ELFSIZE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'ELFSIZE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'ELFSIZE='> name:ELFSIZE) op: assign_op.Equal rhs: {<64>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'SCRIPT_NAME='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'SCRIPT_NAME='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'SCRIPT_NAME='> name:SCRIPT_NAME) op: assign_op.Equal rhs: {<elf>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'OUTPUT_FORMAT='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'OUTPUT_FORMAT='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'OUTPUT_FORMAT='> name:OUTPUT_FORMAT) op: assign_op.Equal rhs: {(DQ <elf64-mmix>)} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'NO_REL_RELOCS='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'NO_REL_RELOCS='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'NO_REL_RELOCS='> name:NO_REL_RELOCS) op: assign_op.Equal rhs: {<yes>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'ENTRY='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'ENTRY='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'ENTRY='> name:ENTRY) op: assign_op.Equal rhs: {<_start.>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'TEXT_START_ADDR='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'TEXT_START_ADDR='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'TEXT_START_ADDR='> name:TEXT_START_ADDR) op: assign_op.Equal rhs: {(SQ <'DEFINED (__.MMIX.start..text) ? __.MMIX.start..text : 0'>)} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'TEXT_BASE_ADDRESS='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'TEXT_BASE_ADDRESS='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'TEXT_BASE_ADDRESS='> name:TEXT_BASE_ADDRESS) op: assign_op.Equal rhs: {($ Id.VSub_DollarName TEXT_START_ADDR)} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'DATA_ADDR='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'DATA_ADDR='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'DATA_ADDR='> name:DATA_ADDR) op: assign_op.Equal rhs: {(SQ <'DEFINED (__.MMIX.start..data) ? __.MMIX.start..data : 0x2000000000000000'>)} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'MAXPAGESIZE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'MAXPAGESIZE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'MAXPAGESIZE='> name:MAXPAGESIZE) op: assign_op.Equal rhs: {(DQ <'CONSTANT (MAXPAGESIZE)'>)} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'ARCH='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'ARCH='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'ARCH='> name:ARCH) op: assign_op.Equal rhs: {<mmix>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'MACHINE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'MACHINE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'MACHINE='> name:MACHINE) op: assign_op.Equal rhs: (rhs_word__Empty) ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'COMPILE_IN='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'COMPILE_IN='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'COMPILE_IN='> name:COMPILE_IN) op: assign_op.Equal rhs: {<yes>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'EXTRA_EM_FILE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'EXTRA_EM_FILE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'EXTRA_EM_FILE='> name:EXTRA_EM_FILE) op: assign_op.Equal rhs: {<mmixelf>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'OTHER_TEXT_SECTIONS='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'OTHER_TEXT_SECTIONS='> lhs: (sh_lhs_expr.Name left: <Id.Lit_VarLike 'OTHER_TEXT_SECTIONS='> name: OTHER_TEXT_SECTIONS ) op: assign_op.Equal rhs: { (DQ <'\n'> (BracedVarSub left: <Id.Left_DollarBrace '${'> token: <Id.VSub_Name RELOCATING> var_name: RELOCATING suffix_op: (suffix_op.Unary op: <Id.VTest_Plus _> arg_word: {<'\n'> <' _start. = (DEFINED (_start) ? _start\n'> < ' : (DEFINED (Main) ? Main : (DEFINED (.text) ? .text : 0)));\n' > <' PROVIDE (Main = DEFINED (Main) ? Main : (DEFINED (_start) ? _start : _start.));\n'> } ) right: <Id.Right_DollarBrace '}'> ) ) } ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'OTHER_SECTIONS='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'OTHER_SECTIONS='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'OTHER_SECTIONS='> name:OTHER_SECTIONS) op: assign_op.Equal rhs: { (SQ <'\n'> <' .MMIX.reg_contents :\n'> <' {\n'> <' /* Note that this section always has a fixed VMA - that of its\n'> <' first register * 8. */\n'> <' *(.MMIX.reg_contents.linker_allocated);\n'> <' *(.MMIX.reg_contents);\n'> <' }\n'> ) } ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'OTHER_SYMBOLS='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'OTHER_SYMBOLS='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'OTHER_SYMBOLS='> name:OTHER_SYMBOLS) op: assign_op.Equal rhs: {(DQ <'PROVIDE (__Stack_start = 0x6000000000000000);'>)} ) ] redirects: [] ) ] )