(command.CommandList children: [ (command.ShAssignment left: <Id.Lit_VarLike 'SCRIPT_NAME='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'SCRIPT_NAME='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'SCRIPT_NAME='> name:SCRIPT_NAME) op: assign_op.Equal rhs: {<elf32msp430>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'TEMPLATE_NAME='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'TEMPLATE_NAME='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'TEMPLATE_NAME='> name:TEMPLATE_NAME) op: assign_op.Equal rhs: {<msp430>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'EXTRA_EM_FILE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'EXTRA_EM_FILE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'EXTRA_EM_FILE='> name:EXTRA_EM_FILE) op: assign_op.Equal rhs: {<genelf>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'OUTPUT_FORMAT='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'OUTPUT_FORMAT='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'OUTPUT_FORMAT='> name:OUTPUT_FORMAT) op: assign_op.Equal rhs: {(DQ <elf32-msp430>)} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'MACHINE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'MACHINE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'MACHINE='> name:MACHINE) op: assign_op.Equal rhs: (rhs_word__Empty) ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'MAXPAGESIZE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'MAXPAGESIZE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'MAXPAGESIZE='> name:MAXPAGESIZE) op: assign_op.Equal rhs: {<1>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'EMBEDDED='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'EMBEDDED='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'EMBEDDED='> name:EMBEDDED) op: assign_op.Equal rhs: {<yes>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'ARCH='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'ARCH='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'ARCH='> name:ARCH) op: assign_op.Equal rhs: {<msp> <Id.Lit_Colon ':'> <14>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'ROM_START='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'ROM_START='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'ROM_START='> name:ROM_START) op: assign_op.Equal rhs: {<0x8000>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'ROM_SIZE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'ROM_SIZE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'ROM_SIZE='> name:ROM_SIZE) op: assign_op.Equal rhs: {<0x7fe0>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'RAM_START='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'RAM_START='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'RAM_START='> name:RAM_START) op: assign_op.Equal rhs: {<0x0200>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'RAM_SIZE='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'RAM_SIZE='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'RAM_SIZE='> name:RAM_SIZE) op: assign_op.Equal rhs: {<1K>} ) ] redirects: [] ) (command.ShAssignment left: <Id.Lit_VarLike 'STACK='> pairs: [ (AssignPair left: <Id.Lit_VarLike 'STACK='> lhs: (sh_lhs_expr.Name left:<Id.Lit_VarLike 'STACK='> name:STACK) op: assign_op.Equal rhs: {<0x600>} ) ] redirects: [] ) ] )